43 search results - page 2 / 9 » Automatic synthesis and scheduling of multirate DSP algorith... |
ISSS
1995
IEEE
13 years 9 months ago
1995
IEEE
To construct complete systems on silicon, application speci c DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology...
ASPDAC
2005
ACM
13 years 7 months ago
2005
ACM
Abstract— This paper addresses high level synthesis for realtime digital signal processing (DSP) architectures using heterogeneous functional units (FUs). For such special purpos...
ISQED
2005
IEEE
13 years 11 months ago
2005
IEEE
As technology scales down, power supply noise is becoming a performance and reliability bottleneck in modern VLSI. We propose a power supply noise-aware design methodology for hig...
DAC
1995
ACM
13 years 9 months ago
1995
ACM
- We introduce a transformation, named rephasing, that manipulates the timing parameters in control-dataflow graphs. Traditionally high-level synthesis systems for DSP have either ...
DATE
2000
IEEE
13 years 9 months ago
2000
IEEE
There has been a proliferation of block-diagram environments for specifying and prototyping DSP systems. These include tools from academia like Ptolemy [3], and GRAPE [7], and com...