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DAC
2005
ACM
14 years 7 months ago
Automatic generation of customized discrete fourier transform IPs
This paper presents a parameterized soft core generator for the discrete Fourier transform (DFT). Reusable IPs of digital signal processing (DSP) kernels are important time-saving...
Grace Nordin, Peter A. Milder, James C. Hoe, Marku...
SCOPES
2005
Springer
13 years 11 months ago
Software Synthesis from the Dataflow Interchange Format
Specification, validation, and synthesis are important aspects of embedded systems design. The use of dataflow-based design environments for these purposes is becoming increasingl...
Chia-Jui Hsu, Shuvra S. Bhattacharyya
ASPDAC
2005
ACM
104views Hardware» more  ASPDAC 2005»
13 years 8 months ago
On multiple-voltage high-level synthesis using algorithmic transformations
— This paper presents a multiple-voltage high-level synthesis methodology for low power DSP applications using algorithmic transformation techniques. Our approach is motivated by...
Hsueh-Chih Yang, Lan-Rong Dung
DATE
1999
IEEE
105views Hardware» more  DATE 1999»
13 years 10 months ago
Identification and Exploitation of Symmetries in DSP Algorithms
In many algorithms, particularly those in the DSP domain, certain forms of symmetry can be observed. To efficiently implement such algorithms, it is often possible to exploit thes...
C. A. J. van Eijk, E. T. A. F. Jacobs, Bart Mesman...
DAC
2012
ACM
11 years 8 months ago
Equivalence checking for behaviorally synthesized pipelines
Loop pipelining is a critical transformation in behavioral synthesis. It is crucial to producing hardware designs with acceptable latency and throughput. However, it is a complex ...
Kecheng Hao, Sandip Ray, Fei Xie