6 search results - page 1 / 2 » Bit-Width Selection for Data-Path Implementations |
ISSS
1999
IEEE
13 years 8 months ago
1999
IEEE
Specifications of data computations may not necessarily describe the ranges of the intermediate results that can be generated. However, such information is critical to determine t...
FCCM
2004
IEEE
13 years 8 months ago
2004
IEEE
This paper presents a method that offers a uniform treatment for bit-width optimisation of both fixed-point and floating-point designs. Our work utilises automatic differentiation...
FPL
2010
Springer
13 years 2 months ago
2010
Springer
Integer addition is a universal building block, and applications such as quad-precision floating-point or elliptic curve cryptography now demand precisions well beyond 64 bits. Thi...
CODES
2005
IEEE
13 years 10 months ago
2005
IEEE
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
FCCM
2004
IEEE
13 years 8 months ago
2004
IEEE
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...