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» Branch Optimisation Techniques for Hardware Compilation
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MICRO
2000
IEEE
133views Hardware» more  MICRO 2000»
13 years 9 months ago
Compiler controlled value prediction using branch predictor based confidence
Value prediction breaks data dependencies in a program thereby creating instruction level parallelism that can increase program performance. Hardware based value prediction techni...
Eric Larson, Todd M. Austin
MICRO
1994
IEEE
113views Hardware» more  MICRO 1994»
13 years 9 months ago
Static branch frequency and program profile analysis
: Program profiles identify frequently executed portions of a program, which are the places at which optimizations offer programmers and compilers the greatest benefit. Compilers, ...
Youfeng Wu, James R. Larus
HICSS
2003
IEEE
138views Biometrics» more  HICSS 2003»
13 years 10 months ago
Towards Verifying Parametrised Hardware Libraries with Relative Placement Information
Abstract— This paper presents a framework for verifying compilation tools for parametrised hardware libraries with placement information. Such libraries are captured in Pebble, a...
Steve McKeever, Wayne Luk, Arran Derbyshire
CJ
1999
126views more  CJ 1999»
13 years 4 months ago
Source Level Static Branch Prediction
The ability to predict the directions of branches, especially conditional branches, is an important problem in modern computer architecture and advanced compilers. Many static and...
W. F. Wong
MICRO
1998
IEEE
144views Hardware» more  MICRO 1998»
13 years 9 months ago
Analyzing the Working Set Characteristics of Branch Execution
To achieve highly accurate branch prediction, it is necessary not only to allocate more resources to branch prediction hardware but also to improve the understanding of branch exe...
Sangwook P. Kim, Gary S. Tyson