68 search results - page 4 / 14 » Buffered Crossbar Fabrics Based on Networks on Chip |
ANCS
2007
ACM
13 years 9 months ago
2007
ACM
We propose a distributed congestion management scheme for non-blocking, 3-stage Clos networks, comprising plain buffered crossbar switches. VOQ requests are routed using multipath...
MICRO
2010
IEEE
13 years 3 months ago
2010
IEEE
As the number of cores on a single chip increases with more recent technologies, a packet-switched on-chip interconnection network has become a de facto communication paradigm for ...
FCCM
2006
IEEE
13 years 12 months ago
2006
IEEE
This paper presents a novel reconfigurable data flow processing architecture that promises high performance by explicitly targeting both fine- and course-grained parallelism. This...
DAC
2002
ACM
14 years 6 months ago
2002
ACM
In this paper, we introduce a framework to estimate the power consumption on switch fabrics in network routers. We propose different modeling methodologies for node switches, inte...
DFT
2005
IEEE
13 years 11 months ago
2005
IEEE
In this paper, we present two novel methodologies for testing the interconnect fabrics of network-on-chip (NoC) based chips. Both use the concept of recursive testing, with differ...