40 search results - page 2 / 8 » Buffering Interconnect for Multicore Processor Designs |
ISCAS
2008
IEEE
13 years 11 months ago
2008
IEEE
— A new inter-processor communication architecture for chip multiprocessors is proposed which has a low area cost and flexible routing capability. To achieve a low area cost, th...
SASP
2008
IEEE
13 years 11 months ago
2008
IEEE
Ray tracing is a technique used for generating highly realistic computer graphics images. In this paper, we explore the design of a simple but extremely parallel, multi-threaded, ...
HIPC
2009
Springer
13 years 2 months ago
2009
Springer
Large scale compute clusters continue to grow to ever-increasing proportions. However, as clusters and applications continue to grow, the Mean Time Between Failures (MTBF) has redu...
IPPS
2006
IEEE
13 years 11 months ago
2006
IEEE
The designs of high-performance processor architectures are moving toward the integration of a large number of multiple processing cores on a single chip. The IBM Cyclops-64 (C64)...
ISCA
2007
IEEE
13 years 11 months ago
2007
IEEE
High availability is an increasingly important requirement for enterprise systems, often valued more than performance. Systems designed for high availability typically use redunda...