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JUCS
2000
135views more  JUCS 2000»
13 years 5 months ago
The Price of Routing in FPGAs
: Studying the architectural evolution of mainstream field programmable gate arrays (FPGAs) leads to the following remark: in these circuits, the proportion of silicon devoted to r...
Florent de Dinechin
MEMOCODE
2010
IEEE
13 years 3 months ago
FPGA-based combined architecture for stream categorization and intrusion detection
This paper presents a working solution for the MEMOCODE 2010 design contest. The design presented in this paper is implemented in the Xilinx V5LX330 FPGA as a custom circuit. The s...
Sunil Shukla, Rodric Rabbah, Martin Vorbach
FPL
2009
Springer
166views Hardware» more  FPL 2009»
13 years 10 months ago
Modeling post-techmapping and post-clustering FPGA circuit depth
This paper presents an analytical model that relates FPGA architectural parameters to the expected speed of FPGA implementation. More precisely, the model relates the lookuptable ...
Joydip Das, Steven J. E. Wilton, Philip Heng Wai L...
FPGA
1995
ACM
107views FPGA» more  FPGA 1995»
13 years 9 months ago
Multi-way System Partitioning into a Single Type or Multiple Types of FPGAs
This paper considers the problem of partitioning a circuit into a collection of subcircuits, such that each subcircuit is feasible for some device from an FPGA library, and the to...
Dennis J.-H. Huang, Andrew B. Kahng
FPGA
2008
ACM
168views FPGA» more  FPGA 2008»
13 years 6 months ago
Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs
The Field Programmable Counter Array (FPCA) was introduced to improve FPGA performance for arithmetic circuits. An FPCA is a reconfigurable IP core that can be integrated into an ...
Alessandro Cevrero, Panagiotis Athanasopoulos, Had...