63 search results - page 10 / 13 » CMOS gate modeling based on equivalent inverter |
VLSID
2002
IEEE
14 years 6 months ago
2002
IEEE
The improved T and improved n models are proposed for onchip interconnect macromodeling. Using global approximations, simple approximation frames are derived and applied to modeli...
ICIP
2000
IEEE
14 years 7 months ago
2000
IEEE
In this paper, we demonstrate based on the linear model of [1, 2] that inverse halftoning is equivalent to the well-studied problem of deconvolution in the presence of colored noi...
ISCAS
2007
IEEE
14 years 3 days ago
2007
IEEE
— Scaling of CMOS technologies has led to dramatic increase in sub-threshold, gate and reverse biased junction band-to-band-tunneling (BTBT) leakage. Leakage current has now beco...
GLVLSI
2007
IEEE
13 years 9 months ago
2007
IEEE
Reliability modeling and evaluation is expected to be one of the major issues in emerging nano-devices and beyond 22nm CMOS. Such devices would have inherent propensity for gate f...
ICCAD
2002
IEEE
14 years 2 months ago
2002
IEEE
Existing static timing analyzers make several assumptions about circuits, implicitly trading off accuracy for speed. In this paper we examine the validity of these assumptions, no...