Efficient Macromodeling for On-Chip Interconnects

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Efficient Macromodeling for On-Chip Interconnects
The improved T and improved n models are proposed for onchip interconnect macromodeling. Using global approximations, simple approximation frames are derived and applied to modeling of on-chip distributed RC interconnects. The applications lead to equivalent circuit models for on-chip interconnects, which are represented by the improved T and improved n models. By matching the first three moments of an open-ended interconnec4 the improved n model with AWE is consequently obtained, which retains the symmetric structure. The new models for distributed RC interconnects are independent of CMOS gates, and therefore can be directly incorporated into SPICE frames. Numerical experiments show that for current featIKe sizes, the improved T and improved n modeling methods can be used to accurately eva1uate on-chip interconnect effects, while the computational costs are comparable to the original T and original n modeling. The presented macromodeling approaches are useful for quick simulation and...
Qinwei Xu, Pinaki Mazumder
Added 01 Dec 2009
Updated 01 Dec 2009
Type Conference
Year 2002
Authors Qinwei Xu, Pinaki Mazumder
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