15 search results - page 1 / 3 » Cache aware compression for processor debug support |
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
—During post-silicon processor debugging, we need to frequently capture and dump out the internal state of the processor. Since internal state constitutes all memory elements, th...
DAC
2009
ACM
14 years 5 months ago
2009
ACM
Post-silicon processor debugging is frequently carried out in a loop consisting of several iterations of the following two key steps: (i) processor execution for some duration, fo...
EUROMICRO
1996
IEEE
13 years 8 months ago
1996
IEEE
Signature based error detection techniques (e.g. the application of watchdog processors) can be easily extended to support software debugging. The run-time sequence of signatures ...
AHS
2006
IEEE
13 years 10 months ago
2006
IEEE
— This invited paper overviews the low level debug support hardware required for an on-chip predeployment debugging system for sensor networks. The solution provides significant...
IEEEPACT
2005
IEEE
13 years 10 months ago
2005
IEEE
We propose a checkpoint store compression method for coarse-grain giga-scale checkpoint/restore. This mechanism can be useful for debugging, post-mortem analysis and error recover...