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ISCA
2008
IEEE
148views Hardware» more  ISCA 2008»
13 years 11 months ago
Atomic Vector Operations on Chip Multiprocessors
The current trend is for processors to deliver dramatic improvements in parallel performance while only modestly improving serial performance. Parallel performance is harvested th...
Sanjeev Kumar, Daehyun Kim, Mikhail Smelyanskiy, Y...
DAMON
2006
Springer
13 years 9 months ago
Realizing parallelism in database operations: insights from a massively multithreaded architecture
A new trend in processor design is increased on-chip support for multithreading in the form of both chip multiprocessors and simultaneous multithreading. Recent research in databa...
John Cieslewicz, Jonathan W. Berry, Bruce Hendrick...
ISCA
2007
IEEE
208views Hardware» more  ISCA 2007»
13 years 11 months ago
Core fusion: accommodating software diversity in chip multiprocessors
This paper presents core fusion, a reconfigurable chip multiprocessor (CMP) architecture where groups of fundamentally independent cores can dynamically morph into a larger CPU, ...
Engin Ipek, Meyrem Kirman, Nevin Kirman, Jos&eacut...
ERSA
2007
177views Hardware» more  ERSA 2007»
13 years 6 months ago
Energy-Aware System Synthesis for Reconfigurable Chip Multiprocessors
- Even though state-of-the-art FPGAs present new opportunities in exploring low-cost high-performance architectures for floating-point scientific applications, they also pose serio...
Xiaofang Wang, Sotirios G. Ziavras, Jie Hu
DATE
2007
IEEE
114views Hardware» more  DATE 2007»
13 years 11 months ago
Mapping the physical layer of radio standards to multiprocessor architectures
We are concerned with the software implementation of baseband processing for the physical layer of radio standards (“Software Defined Radio - SDR”). Given the constraints for ...
Cyprian Grassmann, Mathias Richter, Mirko Sauerman...