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» Challenges and Solutions for Late- and Post-Silicon Design
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ATS
2010
IEEE
253views Hardware» more  ATS 2010»
13 years 2 months ago
On Signal Tracing for Debugging Speedpath-Related Electrical Errors in Post-Silicon Validation
One of the most challenging problems in post-silicon validation is to identify those errors that cause prohibitive extra delay on speedpaths in the circuit under debug (CUD) and o...
Xiao Liu, Qiang Xu
VLSID
2006
IEEE
183views VLSI» more  VLSID 2006»
13 years 10 months ago
Design Challenges for High Performance Nano-Technology
This tutorial present the key aspects of design challenges and its solutions that are being experienced in VLSI design in the era of nano technology. The focus will be on design c...
Goutam Debnath, Paul J. Thadikaran
BMCBI
2011
12 years 8 months ago
Protein alignment algorithms with an efficient backtracking routine on multiple GPUs
Background: Pairwise sequence alignment methods are widely used in biological research. The increasing number of sequences is perceived as one of the upcoming challenges for seque...
Jacek Blazewicz, Wojciech Frohmberg, Michal Kierzy...