366 search results - page 2 / 74 » Circuit optimization using statistical static timing analysi... |
ICCAD
2009
IEEE
13 years 3 months ago
2009
IEEE
Process and environmental variations continue to present significant challenges to designers of high-performance integrated circuits. In the past few years, while much research has...
DATE
2009
IEEE
14 years 1 days ago
2009
IEEE
— Statistical static timing analysis deals with the increasing variations in manufacturing processes to reduce the pessimism in the worst case timing analysis. Because of the cor...
DATE
2010
IEEE
13 years 10 months ago
2010
IEEE
—We present a new technique for statistical static timing analysis (SSTA) based on Markov chain Monte Carlo (MCMC), that allows fast and accurate estimation of the right-hand tai...
ISQED
2006
IEEE
13 years 11 months ago
2006
IEEE
— A methodology is proposed for interdependent setup time and hold time characterization of sequential circuits. Integrating the methodology into an industrial sign-off static ti...
DAC
2007
ACM
14 years 6 months ago
2007
ACM
The ability to account for the growing impacts of multiple process variations in modern technologies is becoming an integral part of nanometer VLSI design. Under the context of ti...