191 search results - page 2 / 39 » Clock Distribution Design in VLSI Circuits. An Overview |
VLSID
2005
IEEE
14 years 5 months ago
2005
IEEE
Interest in asynchronous circuit design is increasing due to its promise of efficient designs. The quiescent nature of asynchronous circuits allows them to remain in a stable stat...
ARVLSI
1997
IEEE
13 years 9 months ago
1997
IEEE
IBM founded the Austin Research Laboratory to investigate high-performance microprocessorbased systems. Initial e orts have focused on design for high frequency. This resulted in ...
DAC
2009
ACM
13 years 10 months ago
2009
ACM
We present an unconventional clock distribution that emphasizes flexibility and layout independence. It suits a variety of applications, clock domain shapes and sizes using a modu...
GLVLSI
2010
IEEE
13 years 10 months ago
2010
IEEE
Clock skew variations adversely affect timing margins, limiting performance, reducing yield, and may also lead to functional faults. Non-tree clock distribution networks, such as ...
ISPD
2006
ACM
13 years 11 months ago
2006
ACM
Advances in VLSI technology make clock skew more susceptible to process variations. Notwithstanding efficient zero skew routing algorithms, clock skew still limits post-manufactu...