12 search results - page 2 / 3 » Clock Synchronization through Handshake Signalling |
IPPS
2006
IEEE
13 years 11 months ago
2006
IEEE
Among different wireless LAN technologies 802.11a has recently become popular due to its high throughput, large system capacity, and relatively long range. In this paper, we prop...
TVLSI
2010
13 years 11 hour ago
2010
Abstract--An asynchronous high-speed wave-pipelined bit-serial link for on-chip communication is presented as an alternative to standard bit-parallel links. The link employs the di...
ASPLOS
2004
ACM
13 years 10 months ago
2004
ACM
Multiple Clock Domain (MCD) processors are a promising future alternative to today’s fully synchronous designs. Dynamic Voltage and Frequency Scaling (DVFS) in an MCD processor ...
MJ
2007
13 years 4 months ago
2007
With increasingly smaller feature sizes and higher on-chip densities, the power dissipation of VLSI systems has become a primary concern for designers. This paper first describes...
ISCAS
2006
IEEE
13 years 11 months ago
2006
IEEE
Abstract—We present a silicon neuron that uses shunting inhibition (conductance-based) with a synaptic rise-time to achieve synchrony. Synaptic rise-time promotes synchrony by de...