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» CodSim -- A Combined Delay Fault Simulator
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ATS
2000
IEEE
134views Hardware» more  ATS 2000»
13 years 9 months ago
Fsimac: a fault simulator for asynchronous sequential circuits
At very high frequencies, the major potential of asynchronous circuits is absence of clock skew and, through that, better exploitation of relative timing relations. This paper pre...
Susmita Sur-Kolay, Marly Roncken, Ken S. Stevens, ...
ET
2002
97views more  ET 2002»
13 years 4 months ago
Test Generation for Crosstalk-Induced Faults: Framework and Computational Results
Due to technology scaling and increasing clock frequency, problems due to noise effects lead to an increase in design/debugging efforts and a decrease in circuit performance. This...
Wei-Yu Chen, Sandeep K. Gupta, Melvin A. Breuer
ITC
2003
IEEE
119views Hardware» more  ITC 2003»
13 years 10 months ago
Fault Localization using Time Resolved Photon Emission and STIL Waveforms
Faster defect localization is achieved by combining IC simulations and internal measurements. Time resolved photon emission records photons emitted during commutations (current) r...
Romain Desplats, Felix Beaudoin, Philippe Perdu, N...
NSDI
2008
13 years 7 months ago
BFT Protocols Under Fire
Much recent work on Byzantine state machine replication focuses on protocols with improved performance under benign conditions (LANs, homogeneous replicas, limited crash faults), ...
Atul Singh, Tathagata Das, Petros Maniatis, Peter ...
GLVLSI
2010
IEEE
156views VLSI» more  GLVLSI 2010»
13 years 10 months ago
A multi-level approach to reduce the impact of NBTI on processor functional units
NBTI is one of the most important silicon reliability problems facing processor designers today. The impact of NBTI can be mitigated at both the circuit and microarchitecture leve...
Taniya Siddiqua, Sudhanva Gurumurthi