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CODES
2008
IEEE
13 years 5 months ago
Methodology for multi-granularity embedded processor power model generation for an ESL design flow
With power becoming a major constraint for multi-processor embedded systems, it is becoming important for designers to characterize and model processor power dissipation. It is cr...
Young-Hwan Park, Sudeep Pasricha, Fadi J. Kurdahi,...
ISSS
1996
IEEE
123views Hardware» more  ISSS 1996»
13 years 9 months ago
Memory Organization for Improved Data Cache Performance in Embedded Processors
Code generation for embedded processors creates opportunities for several performance optimizations not applicable for traditional compilers. We present techniques for improving d...
Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nico...
RTCSA
2007
IEEE
13 years 11 months ago
Code Size Optimization for Embedded Processors using Commutative Transformations
Code optimization of the offset assignment generated in embedded systems allows for power and space efficient systems. We propose a new heuristic that uses edge classification to ...
Sai Pinnepalli, Jinpyo Hong, J. Ramanujam, Doris L...
DAC
1995
ACM
13 years 9 months ago
Code Optimization Techniques for Embedded DSP Microprocessors
—We address the problem of code optimization for embedded DSP microprocessors. Such processors (e.g., those in the TMS320 series) have highly irregular datapaths, and conventiona...
Stan Y. Liao, Srinivas Devadas, Kurt Keutzer, Stev...
ENTCS
2002
98views more  ENTCS 2002»
13 years 5 months ago
Verified Code Generation for Embedded Systems
Digital signal processors provide specialized SIMD (single instruction multiple data) operations designed to dramatically increase performance in embedded systems. While these ope...
Sabine Glesner, Rubino Geiß, Boris Boesler