21 search results - page 4 / 5 » Code Transformations for Low Power Caching in Embedded Multi... |
ESTIMEDIA
2005
Springer
13 years 10 months ago
2005
Springer
Portable embedded systems require diligence in managing their energy consumption. Thus, power efficient processors coupled with onchip memories (e.g. caches, scratchpads) are the...
CODES
2008
IEEE
13 years 11 months ago
2008
IEEE
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
CODES
2005
IEEE
13 years 10 months ago
2005
IEEE
Even after carefully tuning the memory characteristics to the application properties and the processor speed, during the execution of real applications there are times when the pr...
CODES
2009
IEEE
13 years 6 months ago
2009
IEEE
We present a novel loop transformation technique, particularly well suited for optimizing embedded compilers, where an increase in compilation time is acceptable in exchange for s...
ISCAS
2005
IEEE
13 years 10 months ago
2005
IEEE
— Architectures based on Very Long Instruction Word (VLIW) processors are an optimal choice in the attempt to obtain high performance levels in mobile devices. The effectiveness ...