105 search results - page 2 / 21 » Compiler-managed partitioned data caches for low power |
DATE
2004
IEEE
13 years 9 months ago
2004
IEEE
: Static energy dissipation in cache memories will constitute an increasingly larger portion of total microprocessor energy dissipation due to nanoscale technology characteristics ...
ICCD
2004
IEEE
14 years 2 months ago
2004
IEEE
This paper proposes a power-aware cache block allocation algorithm for the way-selective setassociative cache on embedded systems to reduce energy consumption without additional d...
HPCA
2005
IEEE
13 years 11 months ago
2005
IEEE
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...
ICCD
2001
IEEE
14 years 2 months ago
2001
IEEE
Lowering power consumption in microprocessors, whether used in portables or not, has now become one of the most critical design concerns. On-chip cache memories tend to occupy dom...
DAC
1999
ACM
14 years 6 months ago
1999
ACM
In embedded system design, the designer has to choose an onchip memory configuration that is suitable for a specific application. To aid in this design choice, we present a memory...