15 search results - page 3 / 3 » Compiling ATR Probing Codes for Execution on FPGA Hardware |
FPL
2006
Springer
13 years 9 months ago
2006
Springer
We present an efficient implementation of a state of the art algorithm PixelMatch for matching all pixels within consecutive video frames. The method is of practical interest for ...
CODES
2009
IEEE
14 years 15 hour ago
2009
IEEE
Kahn Process Networks is an appealing model of computation for programming and mapping applications onto multi-processor platforms. Autonomous processes communicate through unboun...
DATE
2009
IEEE
14 years 11 hour ago
2009
IEEE
—Multiprocessor System on Chip (MPSoC) architecture is rapidly gaining momentum for modern embedded devices. The vulnerabilities in software on MPSoCs are often exploited to caus...
FCCM
2008
IEEE
13 years 11 months ago
2008
IEEE
The map-reduce model requires users to express their problem in terms of a map function that processes single records in a stream, and a reduce function that merges all mapped out...
CODES
2007
IEEE
13 years 11 months ago
2007
IEEE
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...