5 search results - page 1 / 1 » Configuration Steering for a Reconfigurable Superscalar Proc... |
IPPS
2005
IEEE
13 years 10 months ago
2005
IEEE
An architecture for a reconfigurable superscalar processor is described in which some of its execution units are implemented in reconfigurable hardware. The overall configuration ...
IPPS
2006
IEEE
13 years 10 months ago
2006
IEEE
A new dynamic vector approach for the selection and management of the configuration of a reconfigurable superscalar processor is proposed. This new method improves on previous wor...
IPPS
2000
IEEE
13 years 9 months ago
2000
IEEE
The instruction sets of general-purpose microprocessors are designed to offer good performance across a wide range of programs. The size and complexity of the instruction sets, how...
IPPS
2005
IEEE
13 years 10 months ago
2005
IEEE
As semiconductor feature sizes decrease, interconnect delay is becoming a dominant component of processor cycle times. This creates a critical need to shift microarchitectural des...
MICRO
2010
IEEE
13 years 2 months ago
2010
IEEE
Single-thread performance, reliability and power efficiency are critical design challenges of future multicore systems. Although point solutions have been proposed to address thes...