105 search results - page 1 / 21 » Constant Multipliers for FPGAs |
PDPTA
2000
13 years 6 months ago
2000
This paper presents a survey of techniques to implement multiplications by constants on FPGAs. It shows in particular that a simple and well-known technique, canonical signed recod...
ASAP
2008
IEEE
13 years 11 months ago
2008
IEEE
Reconfigurable circuits now have a capacity that allows them to be used as floating-point accelerators. They offer massive parallelism, but also the opportunity to design optimi...
TC
2008
13 years 4 months ago
2008
Since redundant number systems allow for constant time addition, they are often at the heart of modular multipliers designed for public key cryptography (PKC) applications. Indeed,...
FCCM
1999
IEEE
13 years 9 months ago
1999
IEEE
This paper presents a method, called multiple constant multiplier trees MCMTs, for producing optimized recon gurable hardware implementations of vector products. An algorithm for ...
FPL
2009
Springer
13 years 9 months ago
2009
Springer
Recent computing-oriented FPGAs feature DSP blocks including small embedded multipliers. A large integer multiplier, for instance for a double-precision floating-point multiplier...