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IPPS
2005
IEEE
13 years 11 months ago
Reducing Power with Performance Constraints for Parallel Sparse Applications
Sparse and irregular computations constitute a large fraction of applications in the data-intensive scientific domain. While every effort is made to balance the computational wor...
Guangyu Chen, Konrad Malkowski, Mahmut T. Kandemir...
ASPDAC
2008
ACM
122views Hardware» more  ASPDAC 2008»
13 years 7 months ago
Total power optimization combining placement, sizing and multi-Vt through slack distribution management
Power dissipation is quickly becoming one of the most important limiters in nanometer IC design for leakage increases exponentially as the technology scaling down. However, power ...
Tao Luo, David Newmark, David Z. Pan
SAC
2010
ACM
13 years 5 months ago
Efficient mapping and voltage islanding technique for energy minimization in NoC under design constraints
Voltage islanding technique in Network-on-Chip (NoC) can significantly reduce the computational energy consumption by scaling down the voltage levels of the processing elements (P...
Pavel Ghosh, Arunabha Sen
ISPD
2006
ACM
126views Hardware» more  ISPD 2006»
13 years 11 months ago
Noise driven in-package decoupling capacitor optimization for power integrity
The existing decoupling capacitance optimization approaches meet constraints on input impedance for package. In this paper, we show that using impedance as constraints leads to la...
Jun Chen, Lei He
ICPP
2005
IEEE
13 years 11 months ago
Peak Power Control for a QoS Capable On-Chip Network
In recent years integrating multiprocessors in a single chip is emerging for supporting various scientific and commercial applications, with diverse demands to the underlying on-c...
Yuho Jin, Eun Jung Kim, Ki Hwan Yum