249 search results - page 4 / 50 » Context Sensitivity in Logical Modeling with Time Delays |
CC
2008
Springer
13 years 7 months ago
2008
Springer
The performance of heap analysis techniques has a significant impact on their utility in an optimizing compiler. Most shape analysis techniques perform interprocedural dataflow ana...
ICCAD
1997
IEEE
13 years 9 months ago
1997
IEEE
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
VTS
2000
IEEE
13 years 10 months ago
2000
IEEE
The performance of deep sub-micron designs can be affected by various parametric variations, manufacturing defects, noise or even modeling errors that are all statistical in natur...
ICCAD
2003
IEEE
14 years 2 months ago
2003
IEEE
Transient Signal Analysis (TSA) is a parametric device testing technique based on the analysis of dynamic (transient) current (iDDT) drawn by the core logic from the power supply ...
CMSB
2006
Springer
13 years 9 months ago
2006
Springer
Based on the logical description of gene regulatory networks developed by R. Thomas, we introduce an enhanced modelling approach that uses timed automata. It yields a refined quali...