31 search results - page 6 / 7 » Controllability-driven Power Virus Generation for Digital Ci... |
ISPD
2004
ACM
13 years 11 months ago
2004
ACM
Modern processors and SoCs require the adoption of poweroriented design styles, due to the implications that power consumption may have on reliability, cost and manufacturability ...
CSREAESA
2003
13 years 7 months ago
2003
Most so-called “adiabatic” digital logic circuit families reported in the low-power design literature are actually not truly adiabatic, in that they do not satisfy the general...
DATE
2009
IEEE
14 years 22 days ago
2009
IEEE
In modern digital ICs, the increasing demand for performance and throughput requires operating frequencies of hundreds of megahertz, and in several cases exceeding the gigahertz r...
DATE
2006
IEEE
14 years 1 days ago
2006
IEEE
This paper describes a fast-lock mixed-mode delaylocked loop (MMDLL) for wide-range operation and multiphase outputs. The architecture of the proposed DLL uses the mixed-mode time...
FPGA
2009
ACM
14 years 23 days ago
2009
ACM
Modern Field Programmable Gate Arrays (FPGAs) are capable of performing complex discrete signal processing algorithms with clock rates above 100MHz. This combined with FPGA’s lo...