92 search results - page 3 / 19 » Correct-by-construction microarchitectural pipelining |
ISCA
2005
IEEE
13 years 11 months ago
2005
IEEE
One of the most important problems faced by microarchitecture designers is the poor scalability of some of the current solutions with increased clock frequencies and wider pipelin...
MICRO
1993
IEEE
13 years 10 months ago
1993
IEEE
The conventional classification of inter-instruction dependencies (data, anti and output dependencies) provides a basic scheme for the analysis of pipeline hazards in pipelined in...
CASES
2008
ACM
13 years 7 months ago
2008
ACM
Although CMOS feature size scaling has been the source of dramatic performance gains, it has lead to mounting reliability concerns due to increasing power densities and on-chip te...
SAMOS
2005
Springer
13 years 11 months ago
2005
Springer
An analytical performance model for out of order issue superscalar micro-processors is presented. This model quantifies the performance impacts of micro-architecture design option...
ISCA
2002
IEEE
13 years 10 months ago
2002
IEEE
An instruction set architecture (ISA) suitable for future microprocessor design constraints is proposed. The ISA has hierarchical register files with a small number of accumulator...