43 search results - page 2 / 9 » Cycle count accurate memory modeling in system level design |
VMCAI
2009
Springer
13 years 11 months ago
2009
Springer
Abstract. Because of its critical importance underlying all other software, lowlevel system software is among the most important targets for formal verification. Low-level systems...
CODES
2004
IEEE
13 years 8 months ago
2004
IEEE
As a result of improvements in process technology, more and more components are being integrated into a single System-on-Chip (SoC) design. Communication between these components ...
NOCS
2007
IEEE
13 years 11 months ago
2007
IEEE
Network-on-Chip (NoC) architectures have a wide variety of parameters that can be adapted to the designer’s requirements. Fast exploration of this parameter space is only possib...
RTCSA
2007
IEEE
13 years 11 months ago
2007
IEEE
— To use the tremendous hardware resources available in next generation MultiProcessor Systems-on-Chip (MPSoC) efficiently, rapid and accurate design space exploration (DSE) met...
EIT
2009
IEEE
13 years 11 months ago
2009
IEEE
—System-level design (SLD) provides a solution to the challenge of increasing design complexity and time-to-market pressure in modern embedded system designs. In this paper, we p...