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DAC
2005
ACM
14 years 6 months ago
FPGA technology mapping: a study of optimality
This paper attempts to quantify the optimality of FPGA technology mapping algorithms. We develop an algorithm, based on Boolean satisfiability (SAT), that is able to map a small s...
Andrew C. Ling, Deshanand P. Singh, Stephen Dean B...
DAC
1996
ACM
13 years 9 months ago
A Boolean Approach to Performance-Directed Technology Mapping for LUT-Based FPGA Designs
Abstract -- This paper presents a novel, Boolean approach to LUTbased FPGA technology mapping targeting high performance. As the core of the approach, we have developed a powerful ...
Christian Legl, Bernd Wurth, Klaus Eckl
FPGA
2009
ACM
168views FPGA» more  FPGA 2009»
13 years 3 months ago
Large-scale wire-speed packet classification on FPGAs
Multi-field packet classification is a key enabling function of a variety of network applications, such as firewall processing, Quality of Service differentiation, traffic billing...
Weirong Jiang, Viktor K. Prasanna
FCCM
1999
IEEE
210views VLSI» more  FCCM 1999»
13 years 10 months ago
Algorithm Analysis and Mapping Environment for Adaptive Computing Systems: Further Results
Abstract We are developing an integrated algorithm analysis and mapping environment particularly tailored for signal processing applications on Adaptive Computing Systems ACS. Our ...
Eric K. Pauer, Paul D. Fiore, John M. Smith
FPGA
2006
ACM
113views FPGA» more  FPGA 2006»
13 years 9 months ago
Optimality study of logic synthesis for LUT-based FPGAs
Abstract--Field-programmable gate-array (FPGA) logic synthesis and technology mapping have been studied extensively over the past 15 years. However, progress within the last few ye...
Jason Cong, Kirill Minkovich