12 search results - page 1 / 3 » Datapath Merging and Interconnection Sharing for Reconfigura... |
ISSS
2002
IEEE
13 years 10 months ago
2002
IEEE
FPL
2009
Springer
13 years 10 months ago
2009
Springer
Spatially-tiled architectures, such as Coarse-Grained Reconfigurable Arrays (CGRAs), are powerful architectures for accelerating applications in the digital-signal processing, em...
FPGA
2004
ACM
13 years 10 months ago
2004
ACM
In this paper, an efficient implementation of a high performance coarse-grain reconfigurable data-path on a mixed-granularity reconfigurable platform is presented. It consists of ...
DAC
2002
ACM
14 years 6 months ago
2002
ACM
Increasing non-recurring engineering (NRE) and mask costs are making it harder to turn to hardwired Application Specific Integrated Circuit (ASIC) solutions for high performance a...
FCCM
1999
IEEE
13 years 9 months ago
1999
IEEE
Technology scaling of CMOS processes brings relatively faster transistors (gates) and slower interconnects (wires), making viable the addition of reconfigurability to increase per...