Sciweavers

46 search results - page 3 / 10
» Decoupling capacitance allocation for timing with statistica...
Sort
View
ASPDAC
2008
ACM
169views Hardware» more  ASPDAC 2008»
13 years 7 months ago
Analytical model for the impact of multiple input switching noise on timing
The timing models used in current Static Timing Analysis tools use gate delays only for single input switching events. It is well known that the temporal proximity of signals arriv...
Rajeshwary Tayade, Sani R. Nassif, Jacob A. Abraha...
ISQED
2005
IEEE
95views Hardware» more  ISQED 2005»
13 years 11 months ago
Statistical Analysis of Clock Skew Variation in H-Tree Structure
This paper discusses clock skew due to manufacturing variability and environmental change. In clock tree design, transition time constraint is an important design parameter that c...
Masanori Hashimoto, Tomonori Yamamoto, Hidetoshi O...
DAC
1997
ACM
13 years 10 months ago
Power Supply Noise Analysis Methodology for Deep-Submicron VLSI Chip Design
This paper describes a new design methodology to analyze the on-chip power supply noise for high performance microprocessors. Based on an integrated package-level and chip-level p...
Howard H. Chen, David D. Ling
ISPD
2003
ACM
110views Hardware» more  ISPD 2003»
13 years 11 months ago
Explicit gate delay model for timing evaluation
Delay evaluation is always a crucial concern in the VLSI design and it becomes increasingly more critical in the nowadays deep-submicron technology. To obtain an accurate delay va...
Muzhou Shao, Martin D. F. Wong, Huijing Cao, Youxi...
CVPR
2000
IEEE
14 years 7 months ago
Statistical Modeling and Performance Characterization of a Real-Time Dual Camera Surveillance System
The engineering of computer vision systems that meet application speci c computational and accuracy requirements is crucial to the deployment of real-life computer vision systems....
Michael Greiffenhagen, Visvanathan Ramesh, Dorin C...