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ASPDAC
2007
ACM
108views Hardware» more  ASPDAC 2007»
13 years 8 months ago
Noise-Direct: A Technique for Power Supply Noise Aware Floorplanning Using Microarchitecture Profiling
This paper proposes Noise-Direct, a design methodology for power integrity aware floorplanning, using microarchitectural feedback to guide module placement. Stringent power constr...
Fayez Mohamood, Michael B. Healy, Sung Kyu Lim, Hs...
ISPD
2005
ACM
126views Hardware» more  ISPD 2005»
13 years 10 months ago
Effects of on-chip inductance on power distribution grid
With increase of clock frequency, on-chip wire inductance starts to play an important role in power/ground distribution analysis, although it has not been considered so far. We pe...
Atsushi Muramatsu, Masanori Hashimoto, Hidetoshi O...
ISCA
2003
IEEE
157views Hardware» more  ISCA 2003»
13 years 10 months ago
Pipeline Damping: A Microarchitectural Technique to Reduce Inductive Noise in Supply Voltage
Scaling of CMOS technology causes the power supply voltages to fall and supply currents to rise at the same time as operating speeds are increasing. Falling supply voltages cause ...
Michael D. Powell, T. N. Vijaykumar
TVLSI
2008
207views more  TVLSI 2008»
13 years 4 months ago
Effective Radii of On-Chip Decoupling Capacitors
Decoupling capacitors are widely used to reduce power supply noise. On-chip decoupling capacitors have traditionally been allocated into the white space available on a die or place...
Mikhail Popovich, Michael Sotman, Avinoam Kolodny,...
ASPDAC
2007
ACM
109views Hardware» more  ASPDAC 2007»
13 years 8 months ago
On Increasing Signal Integrity with Minimal Decap Insertion in Area-Array SoC Floorplan Design
Abstract-- With technology further scaling into deep submicron era, power supply noise become an important problem. Power supply noise problem is getting worse due to serious IR-dr...
Chao-Hung Lu, Hung-Ming Chen, Chien-Nan Jimmy Liu