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DAC
2010
ACM
13 years 5 months ago
Parallel hierarchical cross entropy optimization for on-chip decap budgeting
Decoupling capacitor (decap) placement has been widely adopted as an effective way to suppress dynamic power supply noise. Traditional decap budgeting algorithms usually explore t...
Xueqian Zhao, Yonghe Guo, Zhuo Feng, Shiyan Hu
DAC
2008
ACM
14 years 5 months ago
Automatic package and board decoupling capacitor placement using genetic algorithms and M-FDM
In the design of complex power distribution networks (PDN) with multiple power islands, it is required that the PDN represents a low impedance as seen by the digital modules. This...
Krishna Bharath, Ege Engin, Madhavan Swaminathan
ASPDAC
2006
ACM
111views Hardware» more  ASPDAC 2006»
13 years 10 months ago
Power distribution techniques for dual VDD circuits
Extensive research has proposed the use of multiple on-die power supplies (VDD) for reducing power consumption in CMOS circuits. We present a detailed study and design techniques ...
Sarvesh H. Kulkarni, Dennis Sylvester
MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
13 years 10 months ago
A Floorplan-Aware Dynamic Inductive Noise Controller for Reliable Processor Design
Power delivery is a growing reliability concern in microprocessors as the industry moves toward feature-rich, powerhungrier designs. To battle the ever-aggravating power consumpti...
Fayez Mohamood, Michael B. Healy, Sung Kyu Lim, Hs...
APCCAS
2006
IEEE
271views Hardware» more  APCCAS 2006»
13 years 10 months ago
Leakage Optimized DECAP Design for FPGAs
— On-chip decoupling capacitors (Decaps) are widely used to mitigate on-chip power supply noise. At and below 100nm on-chip decaps face leakage and area overhead problems associa...
Balaji Vaidyanathan, Suresh Srinivasan, Yuan Xie, ...