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MICRO
2009
IEEE
137views Hardware» more  MICRO 2009»
14 years 25 days ago
ESKIMO: Energy savings using Semantic Knowledge of Inconsequential Memory Occupancy for DRAM subsystem
Dynamic Random Access Memory (DRAM) is used as the bulk of the main memory in most computing systems and its energy and power consumption has become a first-class design considera...
Ciji Isen, Lizy Kurian John
ARCS
2009
Springer
14 years 24 days ago
Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
Joseph Gebis, Leonid Oliker, John Shalf, Samuel Wi...
DATE
1999
IEEE
115views Hardware» more  DATE 1999»
13 years 10 months ago
EXPRESSION: A Language for Architecture Exploration through Compiler/Simulator Retargetability
We describe EXPRESSION, a language supporting architectural design space exploration for embedded Systems-onChip (SOC) and automatic generation of a retargetable compiler/simulato...
Ashok Halambi, Peter Grun, Vijay Ganesh, Asheesh K...
DAC
2006
ACM
14 years 7 months ago
Multiprocessor system-on-chip data reuse analysis for exploring customized memory hierarchies
The increasing use of Multiprocessor Systems-on-Chip (MPSoCs) for high performance demands of embedded applications results in high power dissipation. The memory subsystem is a la...
Ilya Issenin, Erik Brockmeyer, Bart Durinck, Nikil...
DATE
2004
IEEE
105views Hardware» more  DATE 2004»
13 years 10 months ago
Time-Energy Design Space Exploration for Multi-Layer Memory Architectures
This paper presents an exploration algorithm which examines execution time and energy consumption of a given application, while considering a parameterized memory architecture. Th...
Radoslaw Szymanek, Francky Catthoor, Krzysztof Kuc...