620 search results - page 1 / 124 » Design and evaluation of an auto-memoization processor |
PDCN
2007
13 years 6 months ago
2007
This paper describes the design and evaluation of an auto-memoization processor. The major point of this proposal is to detect the multilevel functions and loops with no additiona...
FPL
2006
Springer
13 years 8 months ago
2006
Springer
DAC
2005
ACM
13 years 6 months ago
2005
ACM
This paper proposes a rapid and accurate evaluation scheme for cycle counts of a pipelined processor using evaluation reuse technique. Since exploration of an optimal processor is...
VLSISP
2008
13 years 4 months ago
2008
Abstract-- This paper presents the architecture of an Asynchronous Array of simple Processors (AsAP), and evaluates its key architectural features as well as its performance and en...
CODES
2001
IEEE
13 years 8 months ago
2001
IEEE
Interest in synthesis of Application Specific Instruction Set Processors or ASIPs has increased considerably and a number of methodologies have been proposed for ASIP design. A ke...