97 search results - page 2 / 20 » Design and implementation of JPEG encoder IP core |
DATE
2003
IEEE
13 years 10 months ago
2003
IEEE
The design of high performance multimedia systems in a short time force us to use IP's blocks in many designs. However, their correct integration in a design implies more com...
VLSID
2005
IEEE
14 years 5 months ago
2005
IEEE
This paper presents two schemes for the implementation of high performance and low power FIR filtering Intellectual Property (IP) cores. Low power is achieved through the utilizat...
FPL
2009
Springer
13 years 10 months ago
2009
Springer
Reconfigurable computing systems remain difficult to use and program. One way to increase design productivity for these systems is through reuse of previously developed and veri...
EH
2003
IEEE
13 years 10 months ago
2003
IEEE
The paper deals with a new approach to the design of adaptive hardware using common Field Programmable Gate Arrays (FPGA). The ultimate aim is to develop evolvable IP (Intellectua...
DAC
2000
ACM
14 years 6 months ago
2000
ACM
Leading-edge systems-on-chip (SoC) being designed today could reach 20 Million gates and 0.5 to 1 GHz operating frequency. In order to implement such systems, designers are increa...