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» Design for manufacturability in submicron domain
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ICCAD
1996
IEEE
78views Hardware» more  ICCAD 1996»
13 years 9 months ago
Design for manufacturability in submicron domain
- Key characteristics of newly emerging IC technologies render the traditional concept of die size minimization and traditional "design rules" insufficient to handle the ...
Wojciech Maly, Hans T. Heineken, Jitendra Khare, P...
DAC
2000
ACM
14 years 5 months ago
Test challenges for deep sub-micron technologies
The use of deep submicron process technologies presents several new challenges in the area of manufacturing test. While a significant body of work has been devoted to identifying ...
Kwang-Ting Cheng, Sujit Dey, Mike Rodgers, Kaushik...
VLSID
2002
IEEE
60views VLSI» more  VLSID 2002»
14 years 5 months ago
Transistor Flaring in Deep Submicron-Design Considerations
Abstract - The deep sub-micron regime has broughtup several manufacturing issues which impact circuit-performance and design. One such issue is flaring of transistors which causes ...
Vipul Singhal, C. B. Keshav, K. G. Surnanth, P. R....
DFT
1999
IEEE
72views VLSI» more  DFT 1999»
13 years 9 months ago
Yield Estimation of VLSI Circuits with Downscaled Layouts
This paper describes the yield estimation approach to layout scaling of submicron VLSI circuits. The presented method makes it feasible to find scaling factor of the IC design whi...
Witold A. Pleskacz
CORR
2007
Springer
133views Education» more  CORR 2007»
13 years 4 months ago
Virtual Manufacturing : Tools for improving Design and Production
: The research area “Virtual Manufacturing” can be defined as an integrated manufacturing environment which can enhance one or several levels of decision and control in manufac...
Philippe Dépincé, Damien Chablat, Pe...