82 search results - page 2 / 17 » Design of Asynchronous Controllers with Delay Insensitive In... |
ICCD
1997
IEEE
13 years 8 months ago
1997
IEEE
Asynchronous design has a potential of solving many difficulties, such as clock skew and power consumption, which synchronous counterpart suffers with current and future VLSI tech...
DSN
2004
IEEE
13 years 8 months ago
2004
IEEE
This paper presents a novel circuit fault detection and isolation technique for quasi delay-insensitive asynchronous circuits. We achieve fault isolation by a combination of physi...
ENTCS
2010
13 years 4 months ago
2010
This paper extends previous work on the compilation of higher-order imperative languages into digital circuits [4]. We introduce concurrency, an essential feature in the context o...
DATE
2005
IEEE
13 years 10 months ago
2005
IEEE
The purpose of this paper is to formally specify a flow devoted to the design of Differential Power Analysis (DPA) resistant QDI asynchronous circuits. The paper first proposes a ...
ASYNC
1997
IEEE
13 years 9 months ago
1997
IEEE
The realisation of Delay-Insensitive (DI) asynchronous circuits with a CMOS ternary logic is described in this paper. The main advantage of temary logic is the easy realisation of...