41 search results - page 8 / 9 » Design of Reversible Quantum Ternary Comparator Circuits |
GLVLSI
2005
IEEE
13 years 11 months ago
2005
IEEE
As timing requirements in today’s advanced VLSI designs become more aggressive, the need for automated tools to diagnose timing failures increases. This work presents two such a...
CSREAESA
2004
13 years 6 months ago
2004
To perform digital logic in CMOS in a truly adiabatic (asymptotically thermodynamically reversible) fashion requires that logic transitions be driven by a quasitrapezoidal (flat-t...
TIM
2010
12 years 12 months ago
2010
In this paper, a novel low-power design technique is proposed to minimize the standby leakage power in nanoscale CMOS very large scale integration (VLSI) systems by generating the ...
ICPR
2004
IEEE
14 years 6 months ago
2004
IEEE
Parallel processors such as SIMD computers have been successfully used in various areas of high performance image and data processing. Due to their characteristics of highly regula...
ISCAS
2007
IEEE
13 years 11 months ago
2007
IEEE
Abstract—This paper presents a low power 4-bit ADC for subGHz Ultra Wideband (UWB) receivers. The power efficiency is achieved by taking advantage of the low duty cycle feature o...