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LCTRTS
2007
Springer
13 years 11 months ago
Compiler-managed partitioned data caches for low power
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
Rajiv A. Ravindran, Michael L. Chu, Scott A. Mahlk...
LCTRTS
2007
Springer
13 years 11 months ago
Scratchpad allocation for data aggregates in superperfect graphs
Existing methods place data or code in scratchpad memory, i.e., SPM by either relying on heuristics or resorting to integer programming or mapping it to a graph coloring problem. ...
Lian Li 0002, Quan Hoang Nguyen, Jingling Xue
SIES
2008
IEEE
13 years 11 months ago
Performance evaluation of a java chip-multiprocessor
—Chip multiprocessing design is an emerging trend for embedded systems. In this paper, we introduce a Java multiprocessor system-on-chip called JopCMP. It is a symmetric shared-m...
Christof Pitter, Martin Schoeberl
CASES
2006
ACM
13 years 8 months ago
Cost-efficient soft error protection for embedded microprocessors
Device scaling trends dramatically increase the susceptibility of microprocessors to soft errors. Further, mounting demand for embedded microprocessors in a wide array of safety c...
Jason A. Blome, Shantanu Gupta, Shuguang Feng, Sco...
ICCAD
2007
IEEE
164views Hardware» more  ICCAD 2007»
14 years 1 months ago
Architectural power models for SRAM and CAM structures based on hybrid analytical/empirical techniques
— The need to perform power analysis in the early stages of the design process has become critical as power has become a major design constraint. Embedded and highperformance mic...
Xiaoyao Liang, Kerem Turgay, David Brooks