101 search results - page 2 / 21 » Design of Variable Input Delay Gates for Low Dynamic Power C... |
TVLSI
2010
12 years 12 months ago
2010
Dynamic gates have been excellent choice in the design of high-performance modules in modern microprocessors. The only limitation of dynamic gates is their relatively low noise mar...
TVLSI
2002
13 years 4 months ago
2002
Gate diffusion input (GDI)--a new technique of low-power digital combinatorial circuit design--is described. This technique allows reducing power consumption, propagation delay, an...
CORR
2010
Springer
13 years 2 months ago
2010
Springer
Reversible logic design has become one of the promising research directions in low power dissipating circuit design in the past few years and has found its application in low power...
IWSOC
2005
IEEE
13 years 11 months ago
2005
IEEE
This paper explores the design and optimization of Quasi-Floating Gate MOS techniques to lowvoltage/low-power digital circuitry. The simulated power consumption of standard CMOS g...
ICCD
2004
IEEE
14 years 2 months ago
2004
IEEE
— Reduction in test power is important to improve battery life in portable devices employing periodic self-test, to increase reliability of testing and to reduce test-cost. In sc...