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DAC
2006
ACM
14 years 6 months ago
Design space exploration using time and resource duality with the ant colony optimization
Design space exploration during high level synthesis is often conducted through ad-hoc probing of the solution space using some scheduling algorithm. This is not only time consumi...
Gang Wang, Wenrui Gong, Brian DeRenzi, Ryan Kastne...
DAC
2004
ACM
14 years 6 months ago
Statistical optimization of leakage power considering process variations using dual-Vth and sizing
timing analysis tools to replace standard deterministic static timing analyzers whereas [8,27] develop approaches for the statistical estimation of leakage power considering within...
Ashish Srivastava, Dennis Sylvester, David Blaauw
VLSID
2007
IEEE
120views VLSI» more  VLSID 2007»
14 years 5 months ago
Statistical Leakage and Timing Optimization for Submicron Process Variation
Leakage power is becoming a dominant contributor to the total power consumption and dual-Vth assignment is an efficient technique to decrease leakage power, for which effective de...
Yuanlin Lu, Vishwani D. Agrawal
ICCAD
2003
IEEE
114views Hardware» more  ICCAD 2003»
14 years 2 months ago
A Novel Geometric Algorithm for Fast Wire-Optimized Floorplanning
As the size and complexity of VLSI circuits increase, the need for faster floorplanning algorithms also grows. In this work we introduce Traffic, a new method for creating wire- a...
Peter G. Sassone, Sung Kyu Lim
HPCA
2007
IEEE
14 years 5 months ago
Illustrative Design Space Studies with Microarchitectural Regression Models
We apply a scalable approach for practical, comprehensive design space evaluation and optimization. This approach combines design space sampling and statistical inference to ident...
Benjamin C. Lee, David M. Brooks