58 search results - page 3 / 12 » Design of a scalable nanophotonic interconnect for future mu... |
CISIS
2009
IEEE
2009
IEEE
Designing Regular Network-on-Chip Topologies under Technology, Architecture and Software Constraints
13 years 11 months ago
—Regular multi-core processors are appearing in the embedded system market as high performance software programmable solutions. The use of regular interconnect fabrics for them a...
HIPEAC
2010
Springer
14 years 1 months ago
2010
Springer
Abstract. Multi-core processors with shared last-level caches are vulnerable to performance inefficiencies and fairness issues when the cache is not carefully managed between the m...
FPL
2008
Springer
13 years 6 months ago
2008
Springer
For the next generation of multi-core processors, the onchip interconnection networks must be efficient to achieve high data throughput and performance. Moreover, these interconne...
ANCS
2007
ACM
13 years 8 months ago
2007
ACM
Today's large multi-core Internet servers support thousands of concurrent connections or flows. The computation ability of future server platforms will depend on increasing n...
IPPS
2009
IEEE
13 years 11 months ago
2009
IEEE
The increasing demand for computational cycles is being met by the use of multi-core processors. Having large number of cores per node necessitates multi-core aware designs to ext...