10 search results - page 1 / 2 » Design of an Infrastructural IP Dependability Manager for a ... |
DELTA
2010
IEEE
13 years 10 months ago
2010
IEEE
Reconfigurable many-core processors have many advantages over conventionally designed devices, such as low power consumption and very high flexibility. For an increasing number of...
DSD
2010
IEEE
13 years 5 months ago
2010
IEEE
—Periodic on-chip scan-based tests have to be applied to a many-core processor SoC to improve its dependability. An infrastructural IP module has been designed and incorporated i...
DSD
2009
IEEE
14 years 4 days ago
2009
IEEE
—As CMOS process technology advances towards 32nm, SoC complexity continuously grows but its dependability significantly decreases. In this paper, a beamforming chip 1 is designe...
DELTA
2008
IEEE
13 years 12 months ago
2008
IEEE
The advances of CMOS technology towards 45 nm, the high costs of ASIC design, power limitations and fast changing application requirements have stimulated the usage of highly reco...
JEC
2006
13 years 5 months ago
2006
Chip multi-processors (CMP) are rapidly emerging as an important design paradigm for both high performance and embedded processors. These machines provide an important performance...