Sciweavers

5 search results - page 1 / 1
» Design of hierarchical cellular automata for on-chip test pa...
Sort
View
TCAD
2002
106views more  TCAD 2002»
13 years 4 months ago
Design of hierarchical cellular automata for on-chip test pattern generator
This paper introduces the concept of hierarchical cellular automata (HCA). The theory of HCA is developed over the Galois extension field (2 ), where each cell of the CA can store ...
Biplab K. Sikdar, Niloy Ganguly, Parimal Pal Chaud...
ICES
2000
Springer
140views Hardware» more  ICES 2000»
13 years 8 months ago
Evolving Cellular Automata for Self-Testing Hardware
Testing is a key issue in the design and production of digital circuits: the adoption of BIST (Built-In Self-Test) techniques is increasingly popular, but requires efficient algori...
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squill...
ICCD
2004
IEEE
134views Hardware» more  ICCD 2004»
14 years 1 months ago
An Automatic Test Pattern Generation Framework for Combinational Threshold Logic Networks
— We propose an automatic test pattern generation (ATPG) framework for combinational threshold networks. The motivation behind this work lies in the fact that many emerging nanot...
Pallav Gupta, Rui Zhang, Niraj K. Jha
WEA
2010
Springer
284views Algorithms» more  WEA 2010»
13 years 11 months ago
Paging Multiple Users in Cellular Network: Yellow Page and Conference Call Problems
Abstract. Mobile users are roaming in a zone of cells in a cellular network system. The probabilities of each user residing in each cell are known, and all probabilities are indepe...
Amotz Bar-Noy, Panagiotis Cheilaris, Yi Feng 0002
ATS
2000
IEEE
134views Hardware» more  ATS 2000»
13 years 9 months ago
Fsimac: a fault simulator for asynchronous sequential circuits
At very high frequencies, the major potential of asynchronous circuits is absence of clock skew and, through that, better exploitation of relative timing relations. This paper pre...
Susmita Sur-Kolay, Marly Roncken, Ken S. Stevens, ...