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SBCCI
2005
ACM
132views VLSI» more  SBCCI 2005»
13 years 11 months ago
Design and power optimization of CMOS RF blocks operating in the moderate inversion region
In this work the design of radiofrequency CMOS circuit blocks in the 910MHz ISM band, while biasing the MOS transistor in the moderate inversion region, is analyzed. An amplifier ...
Leonardo Barboni, Rafaella Fiorelli
GECCO
2008
Springer
111views Optimization» more  GECCO 2008»
13 years 6 months ago
Single-objective front optimization: application to rf circuit design
This paper proposes a new algorithm which promotes well distributed non-dominated fronts in the parameters space when a single-objective function is optimized. This algorithm is b...
Eduardo José Solteiro Pires, Luís Me...
FDTC
2008
Springer
87views Cryptology» more  FDTC 2008»
13 years 7 months ago
Silicon-level Solutions to Counteract Passive and Active Attacks
This article presents a family of cryptographic ASICs, called SecMat, designed in CMOS 130 nanometer technology by the authors with the help of STMicroelectronics. The purpose of ...
Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger,...
DATE
2009
IEEE
111views Hardware» more  DATE 2009»
14 years 15 days ago
Enabling concurrent clock and power gating in an industrial design flow
— Clock-gating and power-gating have proven to be very effective solutions for reducing dynamic and static power, respectively. The two techniques may be coupled in such a way th...
Leticia Maria Veiras Bolzani, Andrea Calimera, Alb...
ISPD
2004
ACM
134views Hardware» more  ISPD 2004»
13 years 11 months ago
Performance-driven register insertion in placement
As the CMOS technology is scaled into the dimension of nanometer, the clock frequencies and die sizes of ICs are shown to be increasing steadily [5]. Today, global wires that requ...
Dennis K. Y. Tong, Evangeline F. Y. Young