49 search results - page 2 / 10 » Designing logic circuits for probabilistic computation in th... |
ICCAD
2003
IEEE
14 years 2 months ago
2003
IEEE
As current silicon-based techniques fast approach their practical limits, the investigation of nanoscale electronics, devices and system architectures becomes a central research p...
ISQED
2007
IEEE
14 years 1 days ago
2007
IEEE
This paper studies the impact of variability on the noise robustness of logic gates using noise rejection curves (NRCs). NRCs allow noise pulses to be modeled using magnitude-dura...
DAC
1996
ACM
13 years 10 months ago
1996
ACM
A novel methodology for circuit design and automatic layout generation is proposed for a class of mixed-signal circuits in presence of layout parasitics and substrate induced nois...
DAC
2008
ACM
14 years 6 months ago
2008
ACM
As integrated circuit technology plumbs ever greater depths in the scaling of feature sizes, maintaining the paradigm of deterministic Boolean computation is increasingly challeng...
GLVLSI
2006
IEEE
13 years 11 months ago
2006
IEEE
As CMOS devices and operating voltages are scaled down, noise and defective devices will impact the reliability of digital circuits. Probabilistic computing compatible with CMOS o...