38 search results - page 8 / 8 » Device and Technology Challenges for Nanoscale CMOS |
ISQED
2011
IEEE
12 years 9 months ago
2011
IEEE
The extent to which the 6T SRAM bit cell can be perpetuated through continued scaling is of enormous technological and economic importance. Understanding the growing limitations i...
CASES
2008
ACM
13 years 7 months ago
2008
ACM
Although CMOS feature size scaling has been the source of dramatic performance gains, it has lead to mounting reliability concerns due to increasing power densities and on-chip te...
MICRO
2008
IEEE
13 years 12 months ago
2008
IEEE
Scaling of CMOS feature size has long been a source of dramatic performance gains. However, the reduction in voltage levels has not been able to match this rate of scaling, leadin...