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» Direct synthesis of timed asynchronous circuits
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ISQED
2006
IEEE
109views Hardware» more  ISQED 2006»
13 years 10 months ago
Dual-K Versus Dual-T Technique for Gate Leakage Reduction : A Comparative Perspective
As a result of aggressive technology scaling, gate leakage (gate oxide direct tunneling) has become a major component of total power dissipation. Use of dielectrics of higher perm...
Saraju P. Mohanty, Ramakrishna Velagapudi, Elias K...
VLSID
2006
IEEE
183views VLSI» more  VLSID 2006»
13 years 10 months ago
Design Challenges for High Performance Nano-Technology
This tutorial present the key aspects of design challenges and its solutions that are being experienced in VLSI design in the era of nano technology. The focus will be on design c...
Goutam Debnath, Paul J. Thadikaran
DAC
2009
ACM
14 years 5 months ago
Matching-based minimum-cost spare cell selection for design changes
Metal-only ECO realizes the last-minute design changes by revising the photomasks of metal layers only. This task is challenging because the pre-injected spare cells are limited b...
Iris Hui-Ru Jiang, Hua-Yu Chang, Liang-Gi Chang, H...