76 search results - page 1 / 16 » Doubled Patterns are 3-Avoidable |
ICCAD
2010
IEEE
13 years 3 months ago
2010
IEEE
In Double Patterning Lithography (DPL), conflict and stitch minimization are two main challenges. Post-routing mask decomposition algorithms [1
ICCAD
2009
IEEE
13 years 3 months ago
2009
IEEE
Double patterning lithography (DPL) is a likely resolution enhancement technique for IC production in 32nm and below technology nodes. However, DPL gives rise to two independent, ...
TCAD
2010
13 years 12 hour ago
2010
Abstract--In double patterning lithography (DPL) layout decomposition for 45nm and below process nodes, two features must be assigned opposite colors (corresponding to different ex...
ICCAD
2009
IEEE
13 years 3 months ago
2009
IEEE
Double patterning technology (DPT) has emerged as the most hopeful candidate for the next technology node of the ITRS roadmap [1]. The goal of a DPT decomposer is to decompose the...
ASPDAC
2010
ACM
13 years 3 months ago
2010
ACM
As Double Patterning Lithography(DPL) becomes the leading candidate for sub-30nm lithography process, we need a fast and lithography friendly decomposition framework. In this pape...