45 search results - page 9 / 9 » Dynamic Data Distribution and Processor Repartitioning for I... |
IPPS
1996
IEEE
13 years 10 months ago
1996
IEEE
In this paper, we study on the EREW-PRAM model a parallel solution to the extended set union problem with unlimited backtracking which maintains a dynamic partition of an n-elemen...
ICS
2004
Tsinghua U.
13 years 11 months ago
2004
Tsinghua U.
In contemporary out-of-order superscalar design, high IPC is mainly achieved by exposing high instruction level parallelism (ILP). Scaling issue window size can certainly provide ...
PPOPP
2010
ACM
14 years 3 months ago
2010
ACM
Drawing inspiration from several previous projects, we present an ownership-record-free software transactional memory (STM) system that combines extremely low overhead with unusua...
IEEEPACT
2006
IEEE
13 years 11 months ago
2006
IEEE
Modern out-of-order processors with non-blocking caches exploit Memory-Level Parallelism (MLP) by overlapping cache misses in a wide instruction window. The exploitation of MLP, h...
CF
2005
ACM
13 years 7 months ago
2005
ACM
This paper evaluates how much extended dictionary-based code compression techniques can reduce the static code size. In their simplest form, such methods statically identify ident...